ADR-0043: Reject Greedy Tail-Home Offset Swaps for Gate B
Status: rejected
Date: 2026-07-30
Visibility: private NAUX architecture/governance record. This ADR is not public roadmap material.
Related: ADR-0037, ADR-0041, ADR-0042
Preserves: canonical home allocator DefinitionOrderV1, target lowering
policy 1.0.0, encoder policy 1.3.0, and every locked R1-S7/R1-S8 identity
Context
ADR-0042 left Gate B open at a local ratio of about 5.87x and identified
tail-SCC home coalescing or superblock lowering as the next structural target.
The first coalescing candidate was deliberately narrow:
- permute compatible physical parameter-home offsets;
- preserve every identity already recognized by policy 1.3;
- accept a move only when no home in the function overlaps;
- retain all existing direct-copy, composition, fusion, and cycle decisions;
- use a deterministic greedy fixed point.
This candidate was attractive because it required no general liveness model and could reuse the new program-wide canonical home allocator. Static identity count and code-size reduction, however, are not sufficient under the North Star performance admission rule. The decision must follow dynamically weighted Gate B evidence.
Decision drivers
- Attack traffic that executes in the fixed Gate B trace, not cold code.
- Preserve simultaneous tail-assignment semantics and every existing fast path.
- Avoid a lowering-policy version and evidence migration for a negligible runtime effect.
- Keep a reproducible negative result so the same local search is not repeated.
- Prefer the smallest optimization whose measured benefit pays for its verifier and maintenance surface.
Options considered
| Option | Benefit | Cost |
|---|---|---|
| Accept the greedy offset policy from static results | Smaller code and more identity arguments | Adds a policy surface while almost all wins are cold or bypassed |
| Broaden greedy search while allowing temporary identity loss | May escape local minima | Requires transactional whole-component reasoning and a new interference proof |
Keep DefinitionOrderV1 and move to weighted superblocks | Directly attacks hot ingress copies and jumps | Requires a stronger operand-substitution and clobber-safety proof |
| Introduce general register allocation now | Largest possible traffic reduction | Liveness, interference, spills, and verification are too broad for the next increment |
Experiment
The read-only policy-1.3 audit used the complete canonical BranchMix target and the exact fixed Gate B dynamic trace.
Structural shape:
functions 121
tail SCCs 50
largest SCC 54
internal cross-function scalar affinities 650
baseline exact/physical identities 969
Only 11 single-home moves were initially legal while preserving all existing identities. The deterministic fixed point accepted all 11:
f28 -> f31 arguments 4..9 6 moves
f29 -> f32 arguments 4..8 5 moves
The result remained structurally safe:
currently direct original routes 125 -> 125
policy-1.3 composed routes 78 -> 78
cyclic two-phase fallbacks 2 -> 2
no-op threaded blocks 28 -> 28
Static results looked material:
identity arguments 969 -> 991
selected-route copy words 374 -> 327
selected-route copy memops 701 -> 607
predicted raw target bytes 8,070 -> 7,318
The exact weighted trace disproved the runtime case:
executed blocks 51,067,120 -> 51,067,120
executed tail jumps 38,484,078 -> 38,484,078
executed tail memops 238,559,154 -> 238,557,894
tail memops removed 1,260
relative tail-memop change 5.28 ppm
Ten static sites changed, but only f22b0 and f31b0 executed in the frozen
trace. Each ran exactly 63 times and saved five copy words per visit. The other
eight sites were cold or bypassed by policy-1.3 route composition.
A fixed-point run and 1,000 deterministic randomized move orderings all converged to the same 991 identities and weighted traffic. Greedy therefore did not merely choose a poor ordering inside this single-swap search space. A better coalescer would need coordinated whole-component relocation with an explicit interference certificate.
Decision
Reject the greedy single-function tail-home offset policy as a Gate B optimization.
Do not:
- add
TailSccGreedyV0to the canonical allocator; - change the lowering or encoder policy version;
- migrate any target, native, IPC, standalone, or ELF identity;
- report the predicted 9.32% code-size reduction as a runtime improvement.
Keep DefinitionOrderV1 as the only active home policy. Retain the neutral
program-wide allocator boundary because it removes lowerer/verifier drift and
is the correct authority point for a future transactional whole-SCC policy.
The next implementation candidate is dynamically weighted one-instruction tail superblock lowering. It must eliminate hot ingress transfer work under a narrow operand-substitution and clobber-safety proof, retain the ordinary encoding on proof failure, and pass the unchanged Gate B measurement.
Consequences
Positive
- No version or evidence churn is spent on a 5.28-ppm traffic reduction.
- The active allocator stays simple, byte-identical, and independently rederived by the verifier.
- A tempting static-code-size result cannot be mistaken for Gate B progress.
- The negative search result and its exact scope are reproducible.
- Work moves to the 16 weighted superblock sites that account for material dynamic ingress traffic.
Negative
- The target remains at 8,070 bytes and retains the current home traffic.
- A potentially useful cold-code size policy is deferred.
- Whole-SCC transactional coalescing remains an unsolved, larger proof obligation.
Revisit conditions
Reconsider home coalescing only when at least one of these exists:
- a deterministic whole-SCC permutation with explicit non-overlap, type-preservation, and simultaneous-assignment evidence;
- a weighted model showing material hot-path reduction on the fixed trace;
- a general register-residency policy whose interference proof subsumes the home permutation.
Static identity count or blob size alone is not sufficient.